Semiconductor wafers are commonly constructed in layers, where a portion of a circuit is created on a first level and conductive vias are made to connect up to the next level of the circuit. After each layer of the circuit is etched on the semiconductor wafer, an oxide layer is laid down. The oxide layer allows the vias to pass through, but covers the rest of the previous circuit level. Each layer of the circuit can create or add non-uniformities to the semiconductor wafer that are preferably smoothed out before generating the next circuit layer.
Chemical mechanical planarization (CMP) is used to planarize the raw wafer and each layer of material added thereafter. Conventional CMP apparatuses often use a rotating wafer holder that brings the semiconductor wafer into contact with a polishing pad. The polishing pad moves in the plane of the semiconductor wafer surface to be polished. A polishing fluid, such as a chemical polishing agent or slurry containing microabrasives, is applied to the polishing pad. The wafer holder then presses the semiconductor wafer against the rotating polishing pad, and polishing commences.
Conventional CMP systems have difficulty achieving a uniform surface across a semiconductor wafer. With these systems, it has been observed that the removal rate of semiconductor surface is higher toward the center of the semiconductor wafer and lower toward the perimeter of the semiconductor wafer. This uneven removal rate creates undesirable non-uniformities in the surface of the semiconductor wafer.
A CMP apparatus and method are needed that produce a substantially uniform surface across a semiconductor wafer. Specifically, a CMP apparatus and method are needed that have substantially the same removal rate in the center region of the semiconductor wafer as in perimeter region of the semiconductor wafer.